Xmesh: A Mesh-Like Topology for Network on Chip

Cost-aware Topology Customization of Mesh-based Networks-on-Chip

Nowadays, the growing demand for supporting multiple applications causes to use multiple IPs onto the chip. In fact, finding truly scalable communication architecture will be a critical concern. To this end, the Networks-on-Chip (NoC) paradigm has emerged as a promising solution to on-chip communication challenges within the silicon-based electronics. Many of today’s NoC architectures are based...

On Source Routing for Mesh Topology Network on Chip

Deterministic and adaptive distributed routing algorithms have been advocated in all the current NoC architectural proposals. In this paper we make a case for the use of source routing for NoCs, especially for regular topologies like mesh. The advantages of source routing include in-order packet delivery; faster and simpler router design; and possibility of mixing non-minimal paths in a mainly ...

An Extended Diagonal Mesh Topology for Network-on-Chip Architectures

This paper proposes an extended diagonal mesh (XDMesh) topology for network-onchip (NoC) architectures to reduce latency and energy consumption for fast and lowpower communication among remote nodes by including diagonal links in the network. In addition, we compare the performance of the proposed XDMesh with conventional stateof-the art topologies, including mesh, extended-butterfly fat tree (...

Shufle-Exchange Mesh Topology for Networks-on-Chip

Network-on-Chip (NoC) is a promising communication paradigm for multiprocessor system-on-chips. This communication paradigm has been inspired from the packet-based communication networks and aims at overcoming the performance and scalability problems of the shared buses in multi-core SoCs (System on Chips)(Benini & Mecheli, 2002). Although the concept of NoCs is inspired from the traditional in...

Shuffle-Exchange Mesh Topology for Networks-on-Chip